PRESS RELEASE: Casio Cuts Design Cycle Time and Improves Quality Using Cadence Front-End Technologies
Cadence High-Level Synthesis and Logic Verification Help Casio Develop New Graphics Processor for Next-Generation Digital Cameras
SAN JOSE, CA--(Marketwire - July 15, 2010) - Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Japanese giant Casio Computer Co. has adopted Cadence® front-end system, design, and verification technologies to develop a system LSI for digital cameras. Casio reported reduced design cycle time and improved design quality for this chip. The Casio success highlights the type of technology needed to close the "productivity gap" faced by most development teams.
"This project was very important for us, and we relied heavily on Cadence products to succeed," said Masateru Nishimoto, lead engineer, QV Digital Camera Division of Casio. "Using a broad array of Cadence tools, we achieved our goal of developing a top-quality design within a tight timeframe. We had high expectations for the Cadence technology, and they were exceeded."
Casio deployed a broad range of leading Cadence front-end and verification technologies, including high-level synthesis and functional verification, part of the TLM-to-GDS flow. According to Casio, RTL generated by Cadence C-to-Silicon Compiler from SystemC was higher quality than RTL manually created, and it met all target specs.
Casio applied Incisive® Enterprise Simulator to improve SoC verification productivity, and Incisive Enterprise Manager to improve predictability through coverage-driven methodology.
The company also stated that engineers were able to cut hundreds of thousands of gates and significantly reduce leakage power with Encounter® RTL Compiler, while avoiding routing congestion problems at the back-end. Encounter Conformal® Equivalent Checker was used to complete equivalency checking in a short period of time, and Casio also cited time reduction and improved quality by using Conformal ECO Designer to implement and verify late-stage functional engineering change orders (ECOs).
"Casio creates advanced products, and we are proud to have played a role in the development of the complex graphics processor used in the next generation of digital cameras," said Michał Siwiński, group director of product management at Cadence. "By using a wide range of Cadence front-end methodologies and technologies, Casio has demonstrated the benefits customers can expect for effective System, SoC, and Silicon realization."
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
Cadence, the Cadence logo, Conformal, Encounter and Incisive are registered trademarks of Cadence Design Systems, Inc., in the USA and other countries. All other marks and names are the property of their respective owners
(First posted on Monday, July 19, 2010 at 18:01 EDT)